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Video Camera LSI
MN673274
Signal-Processing IC for Multipurpose Cameras
s Overview
The MN673274 is designed for surveillance and PC input cameras. In addition to the basic functions of luminance signal and chrominance signal processing, it also integrates microcontroller functions (ALC, AWB, and AGC) and SSG, CG, and I2C-bus circuits on a single chip.
s Features
* Input: Analog signal (A/D converter input) * Output: Digital output YUV signal: 8 bits Analog outputs Y signal C signal Composite video output RGB outputs * Operating supply voltage: 3.3 V 0.3 V * Operating frequency: 9.5 MHz to 28.7 MHz * Main functions * 10-bit A/D converter * 10-bit D/A converter * 2-channel 8-bit D/A converter * Support for analog AGC (NN2038, NN2039) * CG and SSG functions * 510H and 768H (Supports NTSC and PAL ) * Supports progressive scan readout CCDs with complementary color filters for VGA * Supports black-and-white CCD signal processing * CCD white defect/black defect correction circuit * Maximum digital AGC gain: 24 dB * Left/right reversing function * Variable gamma correction ( = 0.3 to 1) * ZV port conforming mode, BT656 conforming mode * External synchronization support: HD/VD, VD2, Sync., LL mode * On-chip I2C-bus circuit * ELC/AGC (Also supports external AGC) * Two-mode white balance (manual/ATW) with ATW lock function * Automatic OB correction function
s Applications
* Surveillance cameras, PC cameras
1
MN673274
s Block Diagram
Video Camera LSI
YUVOE
Y VIN 10-bit A/D AGC Y signal processing Y/C MPX 10-bit D/A C C signal processing ENC 8-bit D/A
YUV0 to 7
Composite Y/C video signal output
RGB CNV White balance gain Carrier signal YLPF Digital AGC control ALC ATN Sub control BLK CSYNC
(2-ch) Y output, G C output, B
Horizontal drive pulse output
Read and write of registers for each circuit block Data WE RE SCL SDA PWM0 PWM1 PWM2 PWM3
CG
I2C-bus control PWM PWM PWM PWM
Vertical drive Sync system pulse output FCK 2FCK FCKO 2FCKO 2
SSG
YUVOE
2
Video Camera LSI
s Pin Arrangement
FCK2O FCKO VSS3 VDD3 YUV7 YUV6 YUV5 YUV4 YUV3 YUV2 YUV1 YUV0 PWM3 PWM2 PWM1 PWM0 VSS2 VDD2 A2 A1 A0 SCL SDA RESET CCDSEL2 CCDSEL1 CCDSEL0 TEST0 TEST1 TEST2 TEST3 TEST4 COIN OBCTL EXTAGC IRIS ALCELC ATWLOCK APGAIN BLCSW DIN8 DIN7 DIN6 DIN5 DIN4 VDD4 VSS4 DIN3 DIN2 DIN1 DIN0 DS2 DS1 TESTDC2 N.C. R N.C. TGVDD TGVSS N.C. H2 N.C. H1 N.C. 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 N.C. V4 V3 VSS5 VDD5 V2 N.C. V1 N.C. SUB N.C. CH2 N.C. CH1 OSCCNT CXIN CXOUT OSCVDD OSCVSS OSCSEL WHD FVD FWHD CPOB PBLK HCLR LLDET FLC VDD1 VSS1 EXTIN0 EXTIN1 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
MN673274
VIN VREFL VREFML ADVDD ADVSS VREFM VREFHM VREFH VREF23 IREF23 COMP23 BSIG DAVSS1 DAVDD1 RSIG VREF1 IREF1 COMP1 GSIG DAVSS2 DAVDD2 VCXO LPFI FVR MINTEST SCANT HREFCBLK VCSYNCVD YUVOE NTPL PCO EXTMOD
(TOP VIEW)
3
MN673274
s Pin Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Pin Name N.C. V4 V3 VSS5 VDD5 V2 N.C. V1 N.C. SUB N.C. CH2 N.C. CH1 OSCCNT CXIN CXOUT OSCVDD OSCVSS OSCSEL WHD FVD FWHD CPOB PBLK HCLR LLDET I/O O O VSS VDD O O O O O O I O VDD VSS I O O O O O O I V1 charge pulse Oscillator control test V3 charge pulse Vertical exclusion pulse V1 charge pulse V4 charge pulse V3 charge pulse Digital system ground Digital system power supply (3.3 V) V2 charge pulse Description
Video Camera LSI
Synchronization oscillator connection (crystal oscillator) Synchronization oscillator connection (crystal oscillator) Oscillator cell power supply Oscillator cell ground Source oscillator 2FCK/4FCK switching WHD signal with a normal phase to Sync VD signal with a normal phase to Sync WHD for CG drive A/D converter input signal clamping pulse/ D/A converter output clamping pulse Pre-blanking pulse Horizontal reference signal Power supply synchronization switching high: LL synchronization Low: internal synchronization,
28 29 30 31 32 33
FLC VDD1 VSS1 EXTIN0 EXTIN1 EXTMOD
I VDD VSS I I I
Flicker correction (pulled-up input) High: flicker correction on Digital system power supply (3.3 V) Digital system ground External synchronization input 1 External synchronization input 2 Surveillance/automotive mode switching (pulled-up input) High: automotive mode (HDVD/Sync synchronization mode)
34 35 4
PCO NTPL
O I
Phase comparator output NTSC/PAL switching Low: NTSC, high: PAL (pulled-down input)
Video Camera LSI
s Pin Descriptions (continued)
Pin No. 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Pin Name YUVOE VCSYNCVD HREFCBLK SCANT MINTEST FVR LPFI VCXO DAVDD2 DAVSS2 GSIG COMP1 IREF1 VREF1 RSIG DAVDD1 DAVSS1 BSIG COMP23 IREF23 VREF23 VREFH VREFHM VREFM ADVSS ADVDD VREFML VREFL VIN TEST4 TEST3 TEST2 TEST1 TEST0 CCDSEL0 CCDSEL1 CCDSEL2 I/O I O O I I I I O VDD VSS O I I I O VDD VSS O I I I I I I VSS VDD I I I I I I I I I I I Description Digital output system output enable
MN673274
VCSYNC output/VD output (VGA mode: CSYNC, IT mode: register switching) HREF output/CBLK output (VGA mode: HREF, IT mode: register switching) Test input (Normally connect low) Test input (Normally connect low) DC level input used for frequency control Low-pass filter analog switch input Analog switch output - LC oscillator D/A converter power supply D/A converter ground Video output (composite/G signal) Connect the resistor RL between GSIG and DAVSS2 Phase compensation Connect a 1 F capacitor between COMP1 and DAVDD2 Bias current resistor connection Connect the resistor RIREF between IREGF1 and DAVSS2 Reference voltage input Video output (luminance/R signal) Connect the resistor RL between RSIG and DAVSS1 D/A converter power supply D/A converter ground Video output (chrominance/B signal) Connect the resistor RL between BSIG and DAVSS1 Phase compensation Connect a 1 F capacitor between this pin and DAVDD1 Bias current resistor connection Connect the resistor RIREF between this pin and DAVSS1 Reference voltage input High-level reference voltage input Intermediate reference potential Connect a capacitor between this pin and ADVSS Intermediate reference potential Connect a capacitor between this pin and ADVSS A/D converter power supply A/D converter ground Intermediate reference potential Connect a capacitor between this pin and ADVSS Low-level reference voltage input Analog signal input Test input (Normally connect low) Test input (Normally connect low) Test input (Normally connect low) Test input (Normally connect low) Test input (Normally connect low) CCD switching CCD switching CCD switching 5
MN673274
s Pin Descriptions (continued)
Pin No. 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 6 Pin Name RESET SDA SCL A0 A1 A2 VDD2 VSS2 PWM0 PWM1 PWM2 PWM3 YUV0 YUV1 YUV2 YUV3 YUV4 YUV5 YUV6 YUV7 VDD3 VSS3 FCKO FCK2O COIN OBCTL EXTAGC IRIS ALCELC ATWLOCK APGAIN BLCSW DIN8 DIN7 DIN6 DIN5 DIN4 I/O I I/O I/O I I I VDD VSS O O O O O O O O O O O O VDD VSS O O I O O O I I I I I I I I I Logic system initialization I2C-bus (data) I2C-bus (clock) EEPROM address (pulled-down input) EEPROM address (pulled-down input) EEPROM address (pulled-down input) Digital system power supply (3.3 V) Digital system ground PWM signal output PWM signal output PWM signal output PWM signal output Digital Y/U/V output (LSB) Digital Y/U/V output Digital Y/U/V output Digital Y/U/V output Digital Y/U/V output Digital Y/U/V output Digital Y/U/V output Digital Y/U/V output (MSB) Digital system power supply (3.3 V) Digital system ground FCK output 2FCK output Synchronization oscillator cell (LC oscillator) Automatic OB correction output External AGC control Mechanical iris locking (PWM output) Locked/ELC switching Low: ELC, high: locked ATW stop. Low: normal, high: ATWLOCK Description
Video Camera LSI
Aperture gain switching Low: register value, high: register value divided by 2 Backlighting correction Low: normal, high: ATWLOCK Digital signal input (MSB) Digital signal input Digital signal input Digital signal input Digital signal input
Video Camera LSI
s Pin Descriptions (continued)
Pin No. 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Pin Name VDD4 VSS4 DIN3 DIN2 DIN1 DIN0 DS2 DS1 TESTDC2 N.C. R N.C. TGVDD TGVSS N.C. H2 N.C. H1 N.C. I/O VDD VSS I I I I O O I O VDD VSS O O H2 transfer pulse H1 transfer pulse CG power supply CG ground R pulse Description Digital system power supply (3.3 V) Digital system ground Digital signal input Digital signal input Digital signal input Digital signal input (LSB) CDS pulse 2 CDS pulse 1 Test input (Normally connect low)
MN673274
s Electrical Characteristics
1. Absolute Maximum Ratings Item Supply voltage (digital system) Supply voltage (analog system) Input voltage Output voltage Output current Power dissipation Operating temperature Storage temperature Symbol VDD AVDD VI VO IO PD Topr Tstg Rating - 0.3 to +4.6 - 0.3 to +4.6 - 0.3 to VDD+ 0.3 - 0.3 to VDD+ 0.3 48 750 -20 to +70 -55 to +150 Unit V V V V mA mW C C
Notes: 1. The absolute maximum ratings are the limiting values for which chip destruction will not occur if that level is applied. Operation is not guaranteed at these levels. 2. The VDD1, VDD2, VDD3, VDD4, VDD5, VDDTG, ADVDD, and DAVDD pins must always be held at the same potential. The VSS1, VSS2, VSS3, VSS4, VSS5, VSSTG, ADVSS, and DAVSS pins must always be held at the same potential.
7
MN673274
s Electrical Characteristics (continued)
2. Recommended Operating Conditions VSS = TGVSS = OSCVSS = ADVSS = DAVSS = 0 V Item Supply voltage (digital) Supply voltage (digital) Supply voltage (analog) Supply voltage (analog) Operating frequency Symbol VDD Condition Digital system power supply
Video Camera LSI
Min 3.0 3.0 9.5
Typ 3.3 3.3 3.3 3.3
Max 3.6 3.6 28.7
Unit V V V V MHz
OSCVDD Oscillator pin power supply ADVDD DAVDD FOSC A/D converter power supply D/A converter power supply Duty 50%
3. DC Characteristics VDD = TGVDD = OSCVDD = 3.0 V to 3.6 V, ADVDD = DAVDD = 3.0 V to 3.6 V, VSS = TGVSS = OSCVSS = ADVSS = DAVSS = 0 V, Ta = -20C to +70C Item Operating supply current Symbol IDD DAIDD ADIDD Condition VDD = TGVDD = TGVDD = 3.6 V ADVDD = DAVDD = 3.6 V FCLK = 28.7 MHz, Ta = 25C Min Typ 80 23 20 Max 120 33 40 Unit mA
Input pins 1-1 Standard input pins EXTIN0, EXTIN1, YUVOE, CCDSEL0 to CCDSEL2, RESET, COIN, ALCELC, ATWLOCK, APGAIN, BLCSW, DIN0 to DIN8, H12BSTP, VDDSW, LLDET Input voltage High level Low level Input leakage current VIH VIL ILIPD VI = VDD or VSS VDD x 0.8 0 -5 VDD VDD x 0.2 5 A V
Input pins 1-2 Pulled-up input pins FLC, EXTMOD Input voltage High level Low level Input leakage current Pull-up resistance VIH VIL ILIPD RPU1 VI = VDD VDD = 3.3 V, VI = VSS VDD x 0.8 0 -10 10 30 VDD VDD x 0.2 10 90 A k V
Input pins 1-3 Pulled-down input pins OSCSEL, NTPL, SCANT, A0 to A2, TEST4 to TEST0, MINTEST Input voltage High level Low level Input leakage current Pull-down resistance VIH VIL ILIPD PPD1 VI = VSS VI = VDD VDD x 0.8 0 -10 10 30 VDD VDD x 0.2 10 90 A k V
Output pins 1-1 V4 to V1, SUB, CH2, CH1, OSCCNT, PCO, WHD, CPOB, PBLK, HCLR, PWM0 to PWM3, OBCTL, EXTAGC, IRIS Output voltage High level Low level VOH VOL IO = - 1 mA IO = 1 mA VDD - 0.6 0.4 V
8
Video Camera LSI
s Electrical Characteristics (continued)
3. DC Characteristics (continued) VDD = TGVDD = OSCVDD = 3.0 V to 3.6 V, ADVDD = DAVDD = 3.0 V to 3.6 V, VSS = TGVSS = OSCVSS = ADVSS = DAVSS = 0 V, Ta = -20C to +70C Item Symbol Condition Min Typ
MN673274
Max
Unit
Output pins 1-2 YUV7 to YUV0 Output voltage High level Low level VOH VOL IO = - 2 mA IO = 2 mA IO = - 4 mA IO = 4 mA IO = - 8 mA IO = 8 mA IO = - 16 mA IO = 16 mA VDD = 3.0 V to 3.6 V VREF5 = 4.75 V to 5.25 V (VREF5 is an external reference voltage.) IO = 4 mA VO = VDD or VSS VDD = 3.3 V Using an external crystal VDD = 3.3 V VI (XI) = VDD or VSS VDD = 3.3 V VI = VSS,VO = VSS VDD = 3.3 V VI = VDD,VO = VDD VDD - 0.6 VDD - 0.6 VDD - 0.6 VDD - 0.6 0.6 0.4 V
Output pins 1-3 VCSYNCVD, HREFCBLK Output voltage High level Low level VOH VOL 0.4 V
Output pins 1-4 FVD, EWHD, FCKO, FCK2O Output voltage High level Low level Output pins 1-5 Output voltage VOH VOL 0.4 V
DS1, DS2, R, H2, H1 High level Low level VOH VOL 0.4 V
I/O pins 1 TTL Schmitt trigger input voltage Output voltage
SDA, SCL Input Threshold voltage Low level VT+ VT- 1.6 1.2 2.2 V
VOL ILO FOSC RFB IOH IOL
- 10
2.2 - 23 24
0.4 10
V A
Output leakage current Oscillator pins 1 CXIN, CXOUT Standard oscillator frequency Internal feedback resistor Output voltage High level Low level
15 0.73 - 9.2 9.6
30 6.6 - 57.5 60
MHz k mA
9
MN673274
s Electrical Characteristics (continued)
4. AC Characteristics Item Input pins 2-1 CXIN Clock waveform Period Clock duty tcyc dclk See figure 1 See figure 1 dclk = thi/tcyc 34.8 Symbol Condition Min
Video Camera LSI
Typ
Max
Unit
50
105.3
ns %
Output pins 1 OSCCNT, PCO, PWM0 to PWM3, YUV0 to YUV7, WHD, CPOB, PBLK, HCLR, VCSYNCVD, HREFCBLK, FVD, EWHD, OBCTL, EXTAGC, IRIS, FCKO, FCK2O, V1 to V4, SUB, CH1, CH2, DS1, DS2, R, H2, H1
tcyc thi Clock CLK Vclk/2 tod Output VDD/2 tclk
Figure 1. I/O Timing
5. A/D Converter VDD = TGVDD = OSCVDD = 3.3 V, ADVDD = DAVDD = 3.3 V, VSS = TGVSS = OSCVSS = ADVSS = DAVSS = 0 V, Ta = 25C Pins: VIN, VREFH, VREFL, VREFM, VREFML, and VREFHM Item Analog input voltage Analog input pin capacitance Reference voltage high level Reference voltage low level Reference resistor (VREFL-VREFH) A/D converter characteristics Resolution Nonlinearity error Differential nonlinearity error Analog input dynamic range RES NLE DNLE VAIN FADCK = 20 MHz VREFH = 2.5 V VREFL = 0.5 V 5.0 2.0 10 7.5 6.5 VREFH - VREFL bit LSB LSB V[p-p] Symbol VAIN CAI VREFH VREFL RREF VIN VIN VREFH VREFL Condition Min VREFL Typ 330 2.5 0.5 440 Max VREFH Unit V pF V V
A/D Converter Recommended Operating Conditions
10
Video Camera LSI
MN673274
6. D/A Converter VDD = TGVDD = OSCVDD = 3.3 V, ADVDD = DAVDD = 3.3 V, VSS = TGVSS = OSCVSS = ADVSS = DAVSS = 0 V, Ta = 25C 1) Pins: VREF23, IREF23, COMP23, BSIG, and RSIG Item Symbol Condition Min Typ Max Unit
D/A Converter Recommended Operating Conditions Reference voltage External phase assurance capacitor External output resistors VREF CCOMP RL RL = 75 RIREF23 = 820 Connect between the COMP23 pin and AVDD. Connect these between the BSIG and RSIG pins respectively, and AVSS. Connect between the IREF23 pin and AVSS. 1.37 1.0 75 V F
External bias current setting resistor D/A converter characteristics Resolution Nonlinearity error Differential nonlinearity error Full-scale voltage Zero-scale voltage
RIREF
820
RES INLE DNLE VOFS VOZS RL = 75 VREF23 = 1.37 V RIREF23 = 820

1.0 0
8 2.5 2.5
bit LSB LSB V V
2) Pins: VREF1, IREF1, COMP1, and GSIG Item Symbol Condition Min Typ Max Unit
D/A Converter Recommended Operating Conditions Reference voltage External phase assurance capacitor External output resistors External bias current setting resistor D/A converter characteristics Resolution Nonlinearity error Differential nonlinearity error Full-scale voltage Zero-scale voltage RES INLE DNLE VOFS VOZS RL = 75 VREF1 = 1.5 V RIREF1 = 1.13 k 1.0 0 10 2.5 2.5 bit LSB LSB V V VREF CCOMP RL RIREF RL = 75 RIREF1 = 1.13 k Connect between the COMP1 pin and AVDD. Connect between the GSIG pin and AVSS. Connect between the IREF1 pin and AVSS. 1.5 1.0 75 1.13 V F k
11
MN673274
s Application System Examples
1. Example A (Minimum configuration) * Internal synchronization * Composite video output
Video Camera LSI
EEPROM
Color CCD
Vertical driver
CDS
MN673274
75 driver
2. Example C * Internal synchronization * RGB output
EEPROM 75 driver Color CCD
Vertical driver
R G B
CDS
MN673274
75 driver 75 driver
3. Example D (Surveillance camera) * External synchronization * YC output
EEPROM LL pulse Color CCD
Vertical driver
CDS AGC
MN673274
YC mixer
75 driver VD2 separation
Analog switch
VCXO VCXO
4. Example E (PC camera) * Internal synchronization * Digital output
EEPROM
Color CCD
Vertical driver
CDS
YUV MN673274 8-bit
5. Example F * Internal synchronization * Y output
EEPROM
Black-andwhite CCD
Vertical driver
CDS
MN673274
75 driver
12
Video Camera LSI
s Package Dimensions (units: mm)
* LQFP128-P-1818C 20.000.20 18.000.10 96 97 65 64
(1.25)
MN673274
128 1 (1.25) 0.50 32 0.200.05
33
0.10 M
1.400.10
18.000.10 20.000.20
0.150.05
(1.00)
0.10
Seating plane
0.100.10 1.70max.
0 to 10 0.500.20
13
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(1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. (2) The technical information described in this material is limited to showing representative characteristics and applied circuit examples of the products. It does not constitute the warranting of industrial property, the granting of relative rights, or the granting of any license. (3) The products described in this material are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: * Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. * Any applications other than the standard applications intended. (4) The products and product specifications described in this material are subject to change without notice for reasons of modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, redundant design is recommended, so that such equipment may not violate relevant laws or regulations because of the function of our products. (6) When using products for which dry packing is required, observe the conditions (including shelf life and after-unpacking standby time) agreed upon when specification sheets are individually exchanged. (7) No part of this material may be reprinted or reproduced by any means without written permission from our company.
Please read the following notes before using the datasheets
A. These materials are intended as a reference to assist customers with the selection of Panasonic semiconductor products best suited to their applications. Due to modification or other reasons, any information contained in this material, such as available product types, technical data, and so on, is subject to change without notice. Customers are advised to contact our semiconductor sales office and obtain the latest information before starting precise technical research and/or purchasing activities. B. Panasonic is endeavoring to continually improve the quality and reliability of these materials but there is always the possibility that further rectifications will be required in the future. Therefore, Panasonic will not assume any liability for any damages arising from any errors etc. that may appear in this material. C. These materials are solely intended for a customer's individual use. Therefore, without the prior written approval of Panasonic, any other use such as reproducing, selling, or distributing this material to a third party, via the Internet or in any other way, is prohibited.
2001 MAR

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